Advanced electronics beckon thanks to self-assembling templates that allow the creation of nanoscale features on silicon wafers
The ever-increasing demand for enhanced performance in electronic devices such as solar cells, sensors and batteries is matched by a need to find ways to make smaller electrical components. Several techniques have been proposed for creating tiny, nanoscale structures on silicon, but these types of ‘nanopatterning’ tend to involve low-throughput, high-cost approaches not suited to large-scale production. Sivashankar Krishnamoorthy and co-workers at the A*STAR Institute of Materials Research and Engineering have now found a simple and robust method for nanopatterning the entire surface of a silicon wafer.
Krishnamoorthy’s technique exploits the self-assembling properties of polymeric nanoparticles, known as reverse micelles. These unconventional particles have a structure consisting of a polar core and an outer layer of non-polar ‘arms’. Reverse micelles can form highly ordered arrays on the surface of a silicon wafer. The resulting ‘coating’ can be used as a lithographic resist to mask the silicon surface during the etching process.
Although other groups have developed similar approaches in previous studies, Krishnamoorthy and co-workers are the first to develop a process that can pattern the entire surface of a silicon wafer with highly uniform nanostructures (see image). The authors have further developed a method to quantify nanostructure variations across large areas using simple optical tools, paving the way for high-throughput nanometrology.
In an additional improvement to the process, the researchers exposed the self-assembled polymer layer to a titanium chloride vapour. The titanium chloride selectively accumulates within each micelle’s polar core. A blast of oxygen plasma then strips away the polymer to leave a pattern of tiny titanium oxide dots. This process converts a soft organic template into a hard inorganic mask much more suited to etching ultra-fine features into the silicon, producing arrays of nanopillars less than 10 nanometers apart.
The findings are expected to be highly adaptable. “Although we have demonstrated the process for creating silicon nanopillars, it is very versatile and can be readily extended to achieve nanopatterns of most other materials, for example, metals, semiconductors and polymers through appropriate post-processing of the initial copolymer templates,” explains Krishnamoorthy. “Other patterns besides nanopillars could also be created, depending on the pattern-transfer processing employed.”
Krishnamoorthy and his team are already exploring the potential applications of their technique. “We are currently making use of this process to create nanodevices for sensing, data storage, and energy applications, such as batteries and solar cells,” Krishnamoorthy says.
The A*STAR-affiliated researchers contributing to this research are from the Institute of Materials Research and Engineering
Krishnamoorthy, S., Manipaddy, K. K., and Yap, F. L. Wafer-level self-organized copolymer templates for nanolithography with sub-50 nm feature and spatial resolutions. Advanced Functional Materials 21, 1102–1112 (2011).